1. Technical Field
The present disclosure relates to an imaging device.
2. Description of the Related Art
A charge coupled device (CCD) image sensor and a complementary metal oxide semiconductor (CMOS) image sensor are widely used for a digital camera or the like. As widely known, those image sensors have a photodiode that is formed in a semiconductor substrate.
Meanwhile, a structure has been suggested in which a photoelectric conversion unit having a photoelectric conversion layer is arranged above the semiconductor substrate (for example, Japanese Unexamined Patent Application Publication No. 2012-209342). An imaging device that has such a structure may be referred to as a stacked image sensor. In the stacked image sensor, charges produced by photoelectric conversion are stored in a charge storage region (also referred to as “floating diffusion”). Signals in accordance with the charge amount stored in the charge storage region are read out via a CCD circuit or a CMOS circuit that is formed on the semiconductor substrate.
In the stacked image sensor, in a case where the photoelectric conversion layer is irradiated with very high illuminance light, the electric potential of the charge storage region rises, and this may result in damage to a transistor or the like in a circuit for signal detection. Japanese Unexamined Patent Application Publication No. 2012-209342 discloses a circuit in which a protection transistor which inhibits the electric potential of a gate electrode of an output transistor from becoming a prescribed value or higher is provided in a pixel (FIG. 1). In the circuit of FIG. 1 of Japanese Unexamined Patent Application Publication No. 2012-209342, in a case where a photoelectric conversion unit P is irradiated with high illuminance light, a diode-connected protection transistor 6 is turned on. The protection transistor 6 is turned on, and excessive charges are discharged to a power source that supplies a power source voltage VDD to an output transistor 7.